Flip Flops and Sequential Logic

D flip-flop | J-K flip-flops | T flip-flops | Triggering flip-flops

Sequential circuits are more powerful than combinational circuits because they can store information between operations performed by combinational circuits. We will focus on synchronous sequential circuits, which are circuits that can be defined from the knowledge of their signals at discrete instants of time. These discrete instants are determined by a clock pulse generator attatched to the circuit.

Flip-flops

Flip-flops are circuits that can maintain their state indefinitely as long as power is supplied, and change their states when directed to by a control input. Flip-flops are given a clock input, which specifies specific moments in time to change state. What makes flip-flops special is that their output is connected back into their input, so that their proceeding state depends on both their current state and their control input. Thus, when analyzing the a flip-flop, we look at its inputs and its current output, or state (usually labelled Q(t)), and from those, determine its next state (usually labelled Q(t+1)).

Kinds of Flip-flops

We will look at 3 types of flip-flops: JK flip-flops, T flip-flops, and D flip flops. They are defined as follows:

D flip-flop

Q(t) D Q(t+1)
000
011
100
111

JK flip-flop

Q(t) J K Q(t+1)
0000
0010
0101
0111
1001
1010
1101
1110

T flip-flop

Q(t) T Q(t+1)
000
011
101
110

Triggering of flip-flops

The flip-flops as given above change state only when a clock signal is present. However, the clock signal is not necessarily instantaneous, so there needs to be a way to prevent the flip-flop from changing state multiple times during a clock cycle. There are 2 ways to achieve this. One is to only change state once the clock cycle is finished. This type of flip-flop is called a master-slave flip-flop. The other is a flip-flop that only triggers during a signal transition. This type is called an edge-triggered flip-flop.

Master-Slave flip-flops

The master-slave flip-flop works by allowing one flip-flop to change state as the clock pulse is active. The output from that flip-flop goes into another flip-flop, which is attatched to an inverted clock input. Thus, the state of the first flip-flop will have settled by the time its output changes the state of the second flip-flop after the clock pulse has finished, and stable output will have been achieved.


Edge Triggered flip-flops

Edge triggered flip-flops trigger only when the pulse is in transition. Some trigger during a positive transition (going from 0-to-1), and are called positive edge triggered flip-flops. Others trigger during a negative transition (going from 1-to-0), and are called negative edge triggered flip-flops.

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